The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2015
Filed:
Nov. 04, 2013
Applicant:
Alpha and Omega Semiconductor Incorporated, Sunnyvale, CA (US);
Inventors:
Hamza Yilmaz, Saratoga, CA (US);
Xiaotian Zhang, San Jose, CA (US);
Yan Xun Xue, Los Gatos, CA (US);
Anup Bhalla, Santa Clara, CA (US);
Jun Lu, San Jose, CA (US);
Kai Liu, Mountain View, CA (US);
Yueh-Se Ho, Sunnyvale, CA (US);
John Amato, Tracy, CA (US);
Assignee:
Alpha and Omega Semiconductor Incorporated, Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/02 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49541 (2013.01); H01L 23/49524 (2013.01); H01L 23/49537 (2013.01); H01L 23/49562 (2013.01); H01L 23/49575 (2013.01); H01L 24/37 (2013.01); H01L 24/40 (2013.01); H01L 24/41 (2013.01); H01L 24/81 (2013.01); H01L 24/84 (2013.01); H01L 23/3107 (2013.01); H01L 24/48 (2013.01); H01L 2224/27013 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29101 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/37011 (2013.01); H01L 2224/40247 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/92 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01067 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/14 (2013.01);
Abstract
The present invention is directed to a lead-frame having a stack of semiconductor dies with interposed metalized clip structure. Level projections extend from the clip structure to ensure that the clip structure remains level during fabrication.