The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Jan. 10, 2013
Applicant:

National Chiao Tung University, Hsinchu, TW;

Inventors:

Ching-Te Chuang, New Taipei, TW;

Nan-Chun Lien, Taipei, TW;

Wei-Nan Liao, Taichung, TW;

Li-Wei Chu, New Taipei, TW;

Chi-Shin Chang, Taichung, TW;

Ming-Hsien Tu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/412 (2006.01); G11C 8/08 (2006.01); G11C 11/418 (2006.01);
U.S. Cl.
CPC ...
G11C 11/412 (2013.01); G11C 8/08 (2013.01); G11C 11/418 (2013.01);
Abstract

A control circuit of SRAM and an operating method thereof are provided. The control circuit includes a memory array, a word-line driver, a boost circuit and a voltage level detecting circuit. The memory array includes a plurality of memory cells. Each memory cell includes a plurality of transistors. The word-line driver is to activate the word-line of the memory array for cell storage data access. The boost circuit is to provide the higher voltage source for the word-line driver and a first operating voltage for boosting the first operating voltage to a second operating voltage. The voltage level detecting circuit is detecting if the first operation voltage needs to be boosted with boost-operation and a detecting-trigger signal and controls the operating of the boost circuit based on the detecting-trigger signal, the first operating voltage and a predetermined voltage.


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