The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2015

Filed:

Aug. 01, 2012
Applicants:

I-chia Lin, Tainan, TW;

Sheng-jian Jou, Huwei Township, TW;

Han-chee Yen, Taipei, TW;

Inventors:

I-Chia Lin, Tainan, TW;

Sheng-Jian Jou, Huwei Township, TW;

Han-Chee Yen, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/08 (2006.01); H01L 23/552 (2006.01); H01L 23/66 (2006.01); H01Q 21/00 (2006.01); H01Q 21/06 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/66 (2013.01); H01L 24/97 (2013.01); H01Q 21/0087 (2013.01); H01Q 21/064 (2013.01); H01Q 21/065 (2013.01); H01L 21/568 (2013.01); H01L 23/295 (2013.01); H01L 23/3135 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 2223/6627 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/97 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19043 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/3011 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first substrate, a second substrate, an interposer substrate, a semiconductor chip, a package body and a first antenna layer. The first substrate comprises a grounding segment. The interposer substrate is disposed between the second substrate and the first substrate. The semiconductor chip is disposed on the second substrate. The package body encapsulates the second substrate, the semiconductor chip and the interposer substrate, and has a lateral surface and an upper surface. The first antenna layer is formed on the lateral surface and the upper surface of the package body, and electrically connected to the grounding segment.


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