The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2015
Filed:
Apr. 13, 2012
Yu-lin Yen, Taipei, TW;
Kuo-hua Liu, Pingzhen, TW;
Yu-lung Huang, Daxi Township, TW;
Tsang-yu Liu, Zhubei, TW;
Yen-shih Ho, Kaohsiung, TW;
Yu-Lin Yen, Taipei, TW;
Kuo-Hua Liu, Pingzhen, TW;
Yu-Lung Huang, Daxi Township, TW;
Tsang-Yu Liu, Zhubei, TW;
Yen-Shih Ho, Kaohsiung, TW;
Other;
Abstract
An embodiment of the invention provides a manufacturing method of a chip package including: providing a semiconductor wafer having a plurality of device regions separated by a plurality of scribe lines; bonding a package substrate to the semiconductor wafer wherein a spacer layer is disposed therebetween and defines a plurality of cavities respectively exposing the device regions and the spacer layer has a plurality of through holes neighboring the edge of the semiconductor wafer; filling an adhesive material in the through holes wherein the material of the spacer layer is adhesive and different from the adhesive material; and dicing the semiconductor wafer, the package substrate and the spacer layer along the scribe lines to form a plurality of chip packages separated from each other.