The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2015

Filed:

Jun. 14, 2013
Applicant:

Taiwan Semiconductor Manufacturing Co. Ltd., Hsin-Chu, TW;

Inventors:

Yue-Der Chih, Hsin-Chu, TW;

Hung-Chang Yu, Hsin-Chu, TW;

Kai-Chun Lin, Hsinchu, TW;

Chin-Yi Huang, Hsinchu, TW;

Laun C. Tran, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); H03M 13/00 (2006.01); G06F 11/10 (2006.01); G06F 11/14 (2006.01); G11C 11/16 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1056 (2013.01); G06F 11/1004 (2013.01); G06F 11/1048 (2013.01); G06F 11/1052 (2013.01); G06F 11/141 (2013.01); G06F 11/1412 (2013.01); G11C 11/1675 (2013.01); G11C 11/1677 (2013.01); G11C 2013/0076 (2013.01);
Abstract

Some aspects of the present disclosure relate a method. The method attempts to write an expected multi-bit word to a memory location in memory. After writing of the multi-bit word has been attempted, an actual multi-bit word is read from the memory location. The actual multi-bit word is then compared with the expected multi-bit word to identify a number of erroneous bits and a number of correct bits stored in the memory location. The number of erroneous bits is re-written to the memory location without attempting to re-write the correct bits to the memory location.


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