The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2015
Filed:
Oct. 24, 2006
Chung-chi Ko, Nautou, TW;
Ting-yu Shen, Jiji, TW;
Keng-chu Lin, Ping-Tung, TW;
Chia-cheng Chou, Keelung, TW;
Tien-i Bao, Hsin-Chu, TW;
Shwang-ming Jeng, Hsin-Chu, TW;
Chen-hua Yu, Hsin-Chu, TW;
Chung-Chi Ko, Nautou, TW;
Ting-Yu Shen, Jiji, TW;
Keng-Chu Lin, Ping-Tung, TW;
Chia-Cheng Chou, Keelung, TW;
Tien-I Bao, Hsin-Chu, TW;
Shwang-Ming Jeng, Hsin-Chu, TW;
Chen-Hua Yu, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method for forming an integrated circuit includes forming a low-k dielectric layer over a semiconductor substrate, etching the low-k dielectric layer to form an opening, forming a dielectric barrier layer covering at least sidewalls of the opening, performing a treatment to improve a wetting ability of the dielectric barrier layer, and filling the opening with a conductive material, wherein the conductive material is in contact with the dielectric barrier layer.