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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9087715 B1

PDFFull Text
Date of Patent:
Jul. 21, 2015

Filed:

Jul. 12, 2012

Nonvolatile semiconductor memory device and method of manufacturing the same

Applicants:

Haruka Kusai, Yokohama, JP;

Kiwamu Sakuma, Yokohama, JP;

Shosuke Fujii, Fujisawa, JP;

Masumi Saitoh, Yokohama, JP;

Masahiro Kiyotoshi, Yokkaichi, JP;

Inventors:

Haruka Kusai, Yokohama, JP;

Kiwamu Sakuma, Yokohama, JP;

Shosuke Fujii, Fujisawa, JP;

Masumi Saitoh, Yokohama, JP;

Masahiro Kiyotoshi, Yokkaichi, JP;

Assignee:

KABUSHIKI KAISHA TOSHIBA, Tokyo, JP;

Attorney:

Oblon, McClelland, Maier & Neustadt, L.L.P.

Primary Examiner:

Peniel M Gumedzoe

Assistant Examiner:

Christoper Johnson

Int. Cl.
CPC ...
H01L 27/115 (2006.01); H01L 27/088 (2006.01); H01L 21/265 (2006.01); H01L 21/02 (2006.01); H01L 21/3205 (2006.01); H01L 21/768 (2006.01); H01L 27/24 (2006.01); G11C 16/04 (2006.01); H01L 29/66 (2006.01); H01L 29/68 (2006.01); H01L 29/788 (2006.01); H01L 29/792 (2006.01); G11C 16/10 (2006.01); H01L 29/82 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); G11C 16/04 (2013.01); G11C 16/10 (2013.01); H01L 21/02367 (2013.01); H01L 21/265 (2013.01); H01L 21/32051 (2013.01); H01L 21/76877 (2013.01); H01L 27/1157 (2013.01); H01L 27/11519 (2013.01); H01L 27/11524 (2013.01); H01L 27/11551 (2013.01); H01L 27/11565 (2013.01); H01L 27/11578 (2013.01); H01L 27/24 (2013.01); H01L 29/66825 (2013.01); H01L 29/66833 (2013.01); H01L 29/685 (2013.01); H01L 29/788 (2013.01); H01L 29/792 (2013.01); H01L 29/82 (2013.01);
Abstract

According to one embodiment, a nonvolatile semiconductor memory device includes a fin-type stacked layer structure having memory cells, and a beam connected to an end portion of the structure. Each of the structure and the beam includes semiconductor layers stacked in a perpendicular direction. The beam includes a contact portion provided at one end of the beam, and a low resistance portion provided between the contact portion and the end portion of the structure.

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