The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 23, 2015
Filed:
Dec. 19, 2013
Applicant:
Xintec Inc., Jhongli, Taoyuan County, TW;
Inventors:
Assignee:
XINTEC INC., Taoyuan, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); B81B 2207/07 (2013.01); B81B 2207/098 (2013.01); B81C 1/00825 (2013.01); B81C 2201/014 (2013.01); B81C 2201/053 (2013.01); B81C 2203/0118 (2013.01);
Abstract
An embodiment of the present invention relates to a chip package and fabrication method thereof, which includes a chip protection layer or an additional etching stop layer to cover conducting pads to prevent dicing residue from damaging or scratching the conducting pads. According to another embodiment, a chip protection layer, an additional etching stop layer formed thereon, or a metal etching stop layer level with conducting pads or combinations thereof may be used when etching an intermetal dielectric layer at a structural etching region and a silicon substrate to form an opening for subsequent semiconductor manufacturing processes.