The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2015
Filed:
Nov. 19, 2013
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Heung-kyu Kwon, Seongnam-si, KR;
Seok-won Lee, Seongnam-si, KR;
Hyon-chol Kim, Hwaseong-si, KR;
Su-chang Lee, Seoul, KR;
Chi-young Lee, Hwaseong-si, KR;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 25/10 (2006.01); H01L 25/00 (2006.01); H01L 21/66 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 24/17 (2013.01); H01L 22/12 (2013.01); H01L 22/20 (2013.01); H01L 23/3128 (2013.01); H01L 23/49816 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48095 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48228 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/014 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15331 (2013.01); H01L 2924/3511 (2013.01); H01L 2924/01079 (2013.01); H01L 2224/16225 (2013.01); H01L 25/00 (2013.01);
Abstract
A semiconductor package can include a substrate body having a first surface and a second surface. A semiconductor chip can be mounted on the first surface and a plurality of electrode pads can be on the second surface and selectively formed to have progressively smaller or larger sizes extending from a central region of the substrate body toward an outer edge of the substrate body based on a reflow soldering process warpage profile for the semiconductor package.