The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2015

Filed:

Aug. 05, 2013
Applicant:

Xintec Inc., Jhongli, Taoyuan County, TW;

Inventors:

Chao-Yen Lin, New Taipei, TW;

Yi-Hang Lin, New Taipei, TW;

Assignee:

Xintec Inc., Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01); H01L 23/525 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); H01L 21/561 (2013.01); H01L 21/6835 (2013.01); H01L 23/3121 (2013.01); H01L 24/13 (2013.01); H01L 23/525 (2013.01); H01L 29/06 (2013.01); H01L 29/0657 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68381 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05558 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2924/14 (2013.01); H01L 2924/1461 (2013.01); H01L 24/48 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/12041 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/16105 (2013.01); H01L 2224/02371 (2013.01); H01L 2224/06167 (2013.01); H01L 2224/02375 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/06165 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73253 (2013.01);
Abstract

An embodiment of the invention provides a chip package which includes: a carrier substrate; a semiconductor substrate having an upper surface and a lower surface, disposed overlying the carrier substrate; a device region or sensing region located on the upper surface of the semiconductor substrate; a conducting pad located on the upper surface of the semiconductor substrate; a conducting layer electrically connected to the conducting pad and extending from the upper surface of the semiconductor substrate to a sidewall of the semiconductor substrate; and an insulating layer located between the conducting layer and the semiconductor substrate.


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