The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2015
Filed:
Nov. 16, 2010
Applicants:
Robert W. Warren, Newport Beach, CA (US);
Hyun Jung Lee, Aliso Viejo, CA (US);
Nic Rossi, Causeway Bay, HK;
Inventors:
Robert W. Warren, Newport Beach, CA (US);
Hyun Jung Lee, Aliso Viejo, CA (US);
Nic Rossi, Causeway Bay, HK;
Assignee:
Conexant Systems, Inc., Irvine, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49503 (2013.01); H01L 21/4828 (2013.01); H01L 23/49548 (2013.01); H01L 24/97 (2013.01); H01L 23/3107 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/97 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/15311 (2013.01); H01L 24/48 (2013.01); H01L 2924/014 (2013.01); H01L 2224/32013 (2013.01);
Abstract
An example semiconductor package with reduced solder voiding is described, which has a leadframe having an I/O pad and a thermal pad, a fabricated semiconductor die having a bond pad, where the fabricated semiconductor die is attached to a top surface of the thermal pad, and a wire bond connecting the bond pad to the I/O pad, where a bottom surface of the thermal pad has channels.