The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2015
Filed:
Oct. 24, 2013
Applicant:
Unity Semiconductor Corporation, Sunnyvale, CA (US);
Inventors:
Lidia Vereen, San Ramon, CA (US);
Bruce Lynn Bateman, Fremont, CA (US);
Louis Parrillo, Austin, TX (US);
Elizabeth Friend, Sunnyvale, CA (US);
David Eggleston, San Jose, CA (US);
Assignee:
Unity Semiconductor Corporation, Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/145 (2013.01); H01L 45/12 (2013.01); H01L 45/1226 (2013.01); H01L 45/1666 (2013.01); H01L 45/08 (2013.01); H01L 45/1233 (2013.01); H01L 45/146 (2013.01); H01L 45/1683 (2013.01); H01L 27/2481 (2013.01); H01L 45/16 (2013.01);
Abstract
In an example, a single damascene structure is formed by, for example, providing a dielectric layer, forming a void in the dielectric layer, and forming a portion of a first two-terminal resistive memory cell and a portion of a second two-terminal resistive memory cell within the void. The portions of the two-terminal resistive memory cells may be vertically stacked within the void.