The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2015
Filed:
Jan. 10, 2011
Applicants:
Chen-hua Yu, Hsin-Chu, TW;
Wen-yao Chang, Hsin-Chu, TW;
Chien Rhone Wang, Hsin-Chu, TW;
Kewei Zuo, Yonghe, TW;
Chung-shi Liu, Shin-Chu, TW;
Inventors:
Chen-Hua Yu, Hsin-Chu, TW;
Wen-Yao Chang, Hsin-Chu, TW;
Chien Rhone Wang, Hsin-Chu, TW;
Kewei Zuo, Yonghe, TW;
Chung-Shi Liu, Shin-Chu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B23K 31/02 (2006.01); H01L 21/44 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01019 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/014 (2013.01); H01L 2924/14 (2013.01); H01L 2224/75501 (2013.01); H01L 2224/75502 (2013.01); H01L 24/13 (2013.01); H01L 24/75 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/7525 (2013.01); H01L 2224/75251 (2013.01); H01L 2224/75252 (2013.01); H01L 2224/75283 (2013.01); H01L 2224/81055 (2013.01); H01L 2224/81097 (2013.01); H01L 2224/8121 (2013.01); H01L 2224/8123 (2013.01); H01L 2224/81805 (2013.01); H01L 2224/8181 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/81098 (2013.01);
Abstract
In a reflow process, a plurality of solder bumps between a first workpiece and a second workpiece is melted. During a solidification stage of the plurality of solder bumps, the plurality of solder bumps is cooled at a first cooling rate. After the solidification stage is finished, the plurality of solder bumps is cooled at a second cooling rate lower than the first cooling rate.