The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2015

Filed:

Sep. 18, 2013
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Chin-Min Huang, Taichung, TW;

Chia-Cheng Chang, Baoshan Township, TW;

Cherng-Shyan Tsay, Toufen Township, TW;

Chien-Wen Lai, Hsinchu, TW;

Kong-Beng Thei, Pao-Shan Village, TW;

Hua-Tai Lin, Hsinchu, TW;

Hung-Chang Hsieh, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G06F 17/5072 (2013.01);
Abstract

One embodiment relates to a method of achieving an circuit dimension which is greater than a size of an exposure field of an illumination tool. A first area of a first reticle field and a second area of a second reticle field are defined. An extension zone is created as a region outside the first area, and includes a first layout shape formed on a first design level. A corresponding forbidden zone is created for the second reticle field as a region inside the second area where no layout shape on the first design level is permitted. A second layout shape is formed on a second design level within the forbidden zone. The first and second areas are then abutted. Upon abutment of the first and second areas, the second layout shape overlaps the first layout shape to form a connection between circuitry of the first and second reticle fields.


Find Patent Forward Citations

Loading…