The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2015

Filed:

Mar. 01, 2012
Applicants:

Wen-tai Wang, Hsinchu County, TW;

Sheng-tsai Huang, Hsinchu County, TW;

Chao-yen Huang, Taipei, TW;

Inventors:

Wen-Tai Wang, Hsinchu County, TW;

Sheng-Tsai Huang, Hsinchu County, TW;

Chao-Yen Huang, Taipei, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01);
Abstract

A receiver circuit is provided which receives an external signal of high voltage and provides a corresponding internal signal of low voltage. The receiver circuit includes a voltage limiter, a level down shifter and an inverter of low operation voltage. The level down shifter has a front node and a back node, and includes a transistor with a gate and a source respectively coupled to the voltage limiter and the inverter at the front node and the back node. The voltage limiter limits level of the external signal transmitted to the front node, the level down shifter shifts down a signal of the front node by a cross voltage to generate a signal of the back node, and the inverter inverts the signal of the back node to generate the internal signal.


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