The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 20, 2015

Filed:

Sep. 16, 2010
Applicants:

Zigmund Ramirez Camacho, Singapore, SG;

Emmanuel Espiritu, Singapore, SG;

Henry Descalzo Bathan, Singapore, SG;

Inventors:

Zigmund Ramirez Camacho, Singapore, SG;

Emmanuel Espiritu, Singapore, SG;

Henry Descalzo Bathan, Singapore, SG;

Assignee:

STATS ChipPAC Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/60 (2006.01); H01L 21/56 (2006.01); H01L 21/58 (2006.01); H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3107 (2013.01); H01L 21/4832 (2013.01); H01L 23/49503 (2013.01); H01L 23/49541 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48257 (2013.01); H01L 2224/73265 (2013.01); H01L 24/48 (2013.01); H01L 2224/32245 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A method of manufacture of an integrated circuit packaging system includes: forming a package paddle group having a first package paddle electrically isolated from a second package paddle; attaching an integrated circuit device on the first package paddle and the second package paddle; forming a standoff terminal adjacent the package paddle group and electrically connected to the integrated circuit device; connecting a paddle connector to the integrated circuit device and the first package paddle and another paddle connector to the integrated circuit device and the second package paddle; and forming an encapsulation over the integrated circuit device, the first package paddle, the second package paddle, and the standoff terminal, the encapsulation exposing a portion of the first package paddle, the second package paddle, and the standoff terminal.


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