The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2014

Filed:

Nov. 11, 2011
Applicants:

King-yuen Wong, Hsinchu, TW;

Chia-pin Lin, Xinpu Township, Hsinchu County, TW;

Chia-yu LU, Hsinchu, TW;

Yi-cheng Tsai, Taoyuan, TW;

Da-wen Lin, Hsinchu, TW;

Kuo-feng Yu, Hsinchu, TW;

Inventors:

King-Yuen Wong, Hsinchu, TW;

Chia-Pin Lin, Xinpu Township, Hsinchu County, TW;

Chia-Yu Lu, Hsinchu, TW;

Yi-Cheng Tsai, Taoyuan, TW;

Da-Wen Lin, Hsinchu, TW;

Kuo-Feng Yu, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/772 (2006.01); H01L 21/265 (2006.01); H01L 27/06 (2006.01); H01L 29/8605 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/26506 (2013.01); H01L 27/0629 (2013.01); H01L 29/8605 (2013.01); H01L 29/66545 (2013.01);
Abstract

A semiconductor device includes a substrate including an isolation region, and a resistor disposed over the isolation region, wherein the resistor includes an implant with an inverse box-like dopant profile that minimizes resistance variation from subsequent planarization variation. A contact is disposed over the resistor. A method of fabricating such a semiconductor device is also provided.


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