The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 2014

Filed:

Mar. 23, 2012
Applicants:

Roger A. Booth, Jr., Irvine, CA (US);

Kangguo Cheng, Guilderland, NY (US);

Robert Hannon, Wappingers Falls, NY (US);

Ravi M. Todi, Poughkeepsie, NY (US);

Geng Wang, Stormville, NY (US);

Inventors:

Roger A. Booth, Jr., Irvine, CA (US);

Kangguo Cheng, Guilderland, NY (US);

Robert Hannon, Wappingers Falls, NY (US);

Ravi M. Todi, Poughkeepsie, NY (US);

Geng Wang, Stormville, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/02 (2006.01); H01L 29/66 (2006.01); H01L 29/94 (2006.01); H01L 27/07 (2006.01); H01L 27/12 (2006.01); H01L 49/02 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/945 (2013.01); H01L 27/1203 (2013.01); H01L 29/66181 (2013.01); H01L 28/90 (2013.01); H01L 27/0605 (2013.01); H01L 27/0733 (2013.01);
Abstract

A method of forming a deep trench capacitor includes providing a wafer. Devices are formed on a front side of the wafer. A through-silicon-via is formed on a substrate of the wafer. Deep trenches are formed on a back side of the wafer. A deep trench capacitor is formed in the deep trench. The through-silicon-via connects the deep trench capacitor to the devices.


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