The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2014
Filed:
Jul. 29, 2011
Applicants:
Yu-ren Chen, Taichung, TW;
Ming Hung Tseng, Toufen Township, TW;
Yi-jen Lai, Chang Hua, TW;
Inventors:
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 23/16 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 2224/06155 (2013.01); H01L 24/16 (2013.01); H01L 2224/13647 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/13082 (2013.01); H01L 24/81 (2013.01); H01L 24/13 (2013.01); H01L 2224/13083 (2013.01); H01L 2224/81191 (2013.01); H01L 23/3128 (2013.01); H01L 24/06 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/81203 (2013.01); H01L 21/563 (2013.01); H01L 24/32 (2013.01); H01L 24/92 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/15311 (2013.01); H01L 2224/131 (2013.01); H01L 2224/05569 (2013.01); H01L 23/16 (2013.01); H01L 2224/05572 (2013.01); H01L 24/73 (2013.01); H01L 2224/73103 (2013.01); H01L 2224/13655 (2013.01);
Abstract
Semiconductor devices, packaging methods and structures are disclosed. In one embodiment, a semiconductor device includes an integrated circuit die with a surface having a peripheral region and a central region. A plurality of bumps is disposed on the surface of the integrated circuit die in the peripheral region. A spacer is disposed on the surface of the integrated circuit die in the central region.