The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2014

Filed:

Jan. 02, 2014
Applicant:

Stmicroelectronics, Inc., Coppell, TX (US);

Inventors:

Sivagnanam Parthasarathy, Carlsbad, CA (US);

Shayan Srinivasa Garani, San Diego, CA (US);

Sudha Thipparthi, Los Angeles, CA (US);

Assignee:

STMicroelectronics, Inc., Coppell, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11B 5/09 (2006.01); G11B 20/18 (2006.01); G11B 27/30 (2006.01);
U.S. Cl.
CPC ...
G11B 27/3027 (2013.01); G11B 20/1866 (2013.01); G11B 2220/2516 (2013.01); G11B 20/1833 (2013.01); G11B 2020/185 (2013.01);
Abstract

An interleave address generation circuit includes a plurality of linear feedback shift registers operable to generate addresses for permuting a data block in a first domain to a data block in a second domain on a subword basis. The interleave address generation circuit is operable to generate the lane addresses for each subword and the linear feedback registers configured to generate circulant addresses and sub-circulant address to map bits in each subword in the data block in the first domain to a corresponding subword in the second domain.


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