The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2014

Filed:

Oct. 31, 2012
Applicant:

Sumitomo Electric Industries, Ltd., Osaka-Shi, Osaka, JP;

Inventors:

Taro Nishiguchi, Itami, JP;

Shin Harada, Osaka, JP;

Shinsuke Fujiwara, Itami, JP;

Assignee:

Sumitomo Electric Industries, Ltd., Osaka-shi, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/15 (2006.01); H01L 31/0312 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor substrate has a main surface and formed of single crystal silicon carbide. The main surface includes a central area, which is an area other than the area within 5 mm from the outer circumference. When the central area is divided into square areas of 1 mm×1 mm, in any square area, density of dislocations of which Burgers vector is parallel to <0001> direction is at most 1×10cm. Thus, a silicon carbide semiconductor substrate enabling improved yield of semiconductor devices can be provided.


Find Patent Forward Citations

Nishiguchi, Taro. (2014). Dislocations in sic semiconductor substrate (U.S. Patent No. 8912550). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8912550

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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