The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2014

Filed:

Apr. 04, 2012
Applicants:

Manjunatha Prabhu, Singapore, SG;

Mahadeva Iyer Natarajan, Clifton Park, NY (US);

Da-wei Lai, Singapore, SG;

Shan Ryan, Singapore, SG;

Inventors:

Manjunatha Prabhu, Singapore, SG;

Mahadeva Iyer Natarajan, Clifton Park, NY (US);

Da-Wei Lai, Singapore, SG;

Shan Ryan, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01); H02H 9/04 (2006.01); H02H 3/20 (2006.01); H02H 3/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clamp circuit includes both nmos and pmos devices connected in series between a voltage source terminal, such as an integrated circuit pad, and ground. A trigger unit, connected between the voltage source and ground, includes a plurality of output terminals coupled to the clamp circuit. The trigger unit is responsive to a voltage threshold, such as caused by an ESD occurrence, between the voltage source and ground to apply clamping signals at its output terminals to couple the voltage source terminal to ground through both nmos and pmos devices.


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