The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 25, 2014
Filed:
Sep. 07, 2012
Srijit Mukherjee, Hillsboro, OR (US);
Christopher J. Wiegand, Portland, OR (US);
Tyler J. Weeks, Hillsboro, OR (US);
Mark Y. Liu, West Linn, OR (US);
Michael L. Hattendorf, Portland, OR (US);
Srijit Mukherjee, Hillsboro, OR (US);
Christopher J. Wiegand, Portland, OR (US);
Tyler J. Weeks, Hillsboro, OR (US);
Mark Y. Liu, West Linn, OR (US);
Michael L. Hattendorf, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Integrated circuits including MOSFETs with selectively recessed gate electrodes. Transistors having recessed gate electrodes with reduced capacitive coupling area to adjacent source and drain contact metallization are provided alongside transistors with gate electrodes that are non-recessed and have greater z-height. In embodiments, analog circuits employ transistors with gate electrodes of a given z-height while logic gates employ transistors with recessed gate electrodes of lesser z-height. In embodiments, subsets of substantially planar gate electrodes are selectively etched back to differentiate a height of the gate electrode based on a given transistor's application within a circuit.