The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2014

Filed:

Oct. 18, 2011
Applicants:

Lei Shi, Jiangsu, CN;

Guohua Gao, Jiangsu, CN;

Yujuan Tao, Jiangsu, CN;

Naomi Masuda, Jiangsu, CN;

Koichi Meguro, Jiangsu, CN;

Inventors:

Lei Shi, Jiangsu, CN;

Guohua Gao, Jiangsu, CN;

Yujuan Tao, Jiangsu, CN;

Naomi Masuda, Jiangsu, CN;

Koichi Meguro, Jiangsu, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/768 (2006.01); H01L 21/78 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76885 (2013.01); H01L 21/78 (2013.01); H01L 23/3178 (2013.01); H01L 21/561 (2013.01); H01L 23/3114 (2013.01); H01L 24/11 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/0347 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/1147 (2013.01); H01L 2224/94 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/0103 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01082 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01023 (2013.01); H01L 2924/01024 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/014 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 2224/05022 (2013.01); H01L 2224/13111 (2013.01);
Abstract

Provided is a method for chip packaging, including the steps of: providing a semi-packaged wafer which has a cutting trail and a metal bonding pad of the chip; forming a first protective layer on the cutting trail; forming on the metal bonding pad a sub-ball metal electrode; forming a solder ball on the sub-ball metal electrode; dicing the wafer along the cutting trail. The first protective layer according to the present invention can prevent the metal in the cutting trail from being separated by electroplating, and protect the lateral sides of a discrete chip after cutting. The process flow thereof is simple, and enhances the efficiency of the packaging as well as its yield.


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Quick Actions:

Shi, Lei. (2014). Method for chip packaging (U.S. Patent No. 8883627). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8883627

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