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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8866026 B1

PDFFull Text
Expired
Date of Patent:
Oct. 21, 2014

Filed:

Aug. 08, 2012

Construction of reliable stacked via in electronic substrates—vertical stiffness control method

Applicants:

Karan Kacker, Atlanta, GA (US);

Douglas O. Powell, Endicott, NY (US);

David L. Questad, Hopewell Junction, NY (US);

David J. Russell, Owego, NY (US);

Sri M. Sri-jayantha, Ossining, NY (US);

Inventors:

Karan Kacker, Atlanta, GA (US);

Douglas O. Powell, Endicott, NY (US);

David L. Questad, Hopewell Junction, NY (US);

David J. Russell, Owego, NY (US);

Sri M. Sri-Jayantha, Ossining, NY (US);

Assignee:

International Business Machines Corporation, Armonk, NY (US);

Attorneys:

Michael J. Buchenhorner

Vazken Alexanian

Primary Examiner:

Jayprakash N Gandhi

Assistant Examiner:

Dion R Ferguson

Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/09 (2006.01); H05K 3/46 (2006.01); H01L 23/498 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 2224/16 (2013.01); H05K 1/0271 (2013.01); H05K 2201/09454 (2013.01); H05K 2201/0969 (2013.01); H05K 2201/096 (2013.01); H01L 2924/15311 (2013.01); H05K 2201/09536 (2013.01); H05K 3/4602 (2013.01); H05K 1/116 (2013.01); H05K 2201/0347 (2013.01); H01L 23/49838 (2013.01); H05K 2201/0959 (2013.01);
Abstract

A stacked via structure for reducing vertical stiffness includes: a plurality of stacked vias, each via disposed on a disc-like structure. The disc-like structure includes a platted through hole landing with a thickness of substantially 3 μm. The platted through hole landing includes an etched pattern and a copper top surface.

Find Patent Forward Citations

Kacker, Karan. (2014). Construction of reliable stacked via in electronic substrates—vertical stiffness control method (U.S. Patent No. 8866026). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8866026

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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