The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 2014
Filed:
Apr. 02, 2010
Yu Zhu, Beijing, CN;
Ming Zhang, Beijing, CN;
Jingsong Wang, Beijing, CN;
LI Tian, Beijing, CN;
Dengfeng Xu, Beijing, CN;
Wensheng Yin, Beijing, CN;
Guanghong Duan, Beijing, CN;
Jinchun HU, Beijing, CN;
Yu Zhu, Beijing, CN;
Ming Zhang, Beijing, CN;
Jingsong Wang, Beijing, CN;
Li Tian, Beijing, CN;
Dengfeng Xu, Beijing, CN;
Wensheng Yin, Beijing, CN;
Guanghong Duan, Beijing, CN;
Jinchun Hu, Beijing, CN;
Tsinghua University, Beijing, CN;
Abstract
A dual-stage exchange system for a lithographic apparatus comprises a silicon chip stage () operating in an exposure workstation () and a silicon chip () stage operating in a pre-processing workstation (). The two silicon chip stages () are provided on the same base stage (), and suspended on an upper surface () of the base stage by air bearings. The two silicon chip stages () can move along guide rails () in the Y direction. One end of each guide rail () is connected to a main driving unit (), and the other end of each guide rail () is butt-jointed with an X-direction single-freedom auxiliary driving unit (). The silicon chip stages () are driven by the single-freedom auxiliary driving units () cooperated with the main driving units () to move along the X direction. The single-freedom auxiliary driving units () can be separated from or precisely butt-jointed with the Y-direction guide rails (), thereby achieving the position exchange of the two silicon chip stages ().