The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2014

Filed:

May. 30, 2013
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Chan-Lon Yang, Taipei, TW;

Ted Ming-Lang Guo, Tainan, TW;

Chin-I Liao, Tainan, TW;

Chin-Cheng Chien, Tainan, TW;

Shu-Yen Chan, Changhua County, TW;

Chun-Yuan Wu, Yun-Lin County, TW;

Assignee:

United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/324 (2006.01); H01L 21/8234 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7848 (2013.01); H01L 21/823425 (2013.01); H01L 21/30608 (2013.01); H01L 29/6656 (2013.01); H01L 29/66636 (2013.01); H01L 21/3247 (2013.01);
Abstract

A strained silicon channel semiconductor structure comprises a substrate having an upper surface, a gate structure formed on the upper surface, at least one recess formed in the substrate at lateral sides of the gate structure, wherein the recess has at least one sidewall which has an upper sidewall and a lower sidewall concaved in the direction to the gate structure, and the included angle between the upper sidewall and horizontal plane ranges between 54.5°-90°, and an epitaxial layer filled into the two recesses.


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