The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 2014

Filed:

Feb. 01, 2012
Applicants:

Neil R. Mclellan, Toronto, CA;

Vincent K. Chan, Richmond Hill, CA;

Roden R. Topacio, Iii, Markham, CA;

Inventors:

Neil R. McLellan, Toronto, CA;

Vincent K. Chan, Richmond Hill, CA;

Roden R. Topacio, III, Markham, CA;

Assignee:

ATI Technologies ULC, Markham, Ontario, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/56 (2006.01); H01L 23/16 (2006.01); H01L 23/00 (2006.01); H01L 23/24 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/563 (2013.01); H01L 2924/01033 (2013.01); H01L 23/16 (2013.01); H01L 24/97 (2013.01); H01L 2924/1517 (2013.01); H01L 23/24 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01013 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/16225 (2013.01); H01L 23/3128 (2013.01); H01L 21/561 (2013.01); H01L 2224/83051 (2013.01); H01L 2924/14 (2013.01); H01L 2224/27013 (2013.01); H01L 2924/3011 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/15311 (2013.01); H01L 2224/97 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/10253 (2013.01); H01L 2224/26175 (2013.01); H01L 2924/30105 (2013.01); H01L 2924/30107 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01087 (2013.01); H01L 2224/32225 (2013.01);
Abstract

An integrated circuit package strip employs a stiffener layer that houses a passive electronic component to maintain mechanical properties when a thinner substrate is used. The use of either a retention wall or a stiffener allows for the manufacture of these integrated circuit package using strip, matrix, or array technology where a larger board with a plurality of integrated circuit packages is produced industrially and then cut to individual units.


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