The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2014
Filed:
Mar. 01, 2012
Chin-ming Lin, Jhunan Township, Miaoli County, TW;
Chia-hung Huang, Hsinchu, TW;
Chi-ming Yang, Hsinchu, TW;
Chin-hsiang Lin, Hsin-chu, TW;
Yung-cheng Chen, Jhubei, TW;
Chih-wei Lin, Hsinchu, TW;
Chin-Ming Lin, Jhunan Township, Miaoli County, TW;
Chia-hung Huang, Hsinchu, TW;
Chi-Ming Yang, Hsinchu, TW;
Chin-Hsiang Lin, Hsin-chu, TW;
Yung-Cheng Chen, Jhubei, TW;
Chih-Wei Lin, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.