The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 2014
Filed:
Nov. 09, 2012
Applicant:
Intermolecular Inc., San Jose, CA (US);
Inventors:
Prashant B Phatak, San Jose, CA (US);
Ronald J. Kuse, San Diego, CA (US);
Jinhong Tong, Santa Clara, CA (US);
Assignee:
Intermolecular, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
Methods for producing RRAM resistive switching elements having reduced forming voltage include preventing formation of interfacial layers, and creating electronic defects in a dielectric film. Suppressing interfacial layers in an electrode reduces forming voltage. Electronic defects in a dielectric film foster formation of conductive pathways.
Phatak, Prashant. (2014). Method for reducing forming voltage in resistive random access memory (U.S. Patent No. 8822265). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8822265
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile