The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 2014

Filed:

Mar. 29, 2012
Applicants:

Charles L. Arvin, Poughkeepsie, NY (US);

Raschid J. Bezama, Mahopac, NY (US);

Harry D. Cox, Rifton, NY (US);

Timothy H. Daubenspeck, Colchester, VT (US);

Krystyna W. Semkow, Poughquang, NY (US);

Timothy D. Sullivan, Underhill, VT (US);

Inventors:

Charles L. Arvin, Poughkeepsie, NY (US);

Raschid J. Bezama, Mahopac, NY (US);

Harry D. Cox, Rifton, NY (US);

Timothy H. Daubenspeck, Colchester, VT (US);

Krystyna W. Semkow, Poughquang, NY (US);

Timothy D. Sullivan, Underhill, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 21/44 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); H01L 2924/014 (2013.01); H01L 2224/13099 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/05075 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05155 (2013.01);
Abstract

Interconnect structures and methods of fabricating the same are provided. The interconnect structures provide highly reliable copper interconnect structures for improving current carrying capabilities (e.g., current spreading). The structure includes an under bump metallurgy formed in a trench. The under bump metallurgy includes at least: an adhesion layer; a plated barrier layer; and a plated conductive metal layer provided between the adhesion layer and the plated barrier layer. The structure further includes a solder bump formed on the under bump metallurgy.


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