The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 2014

Filed:

Oct. 22, 2008
Applicants:

Qian Luo, San Jose, CA (US);

Arvind Sundarrajan, San Jose, CA (US);

Hua Chung, San Jacinto, CA (US);

Xianmin Tang, San Jose, CA (US);

Jick M. Yu, San Jose, CA (US);

Murali K. Narasimhan, San Jose, CA (US);

Inventors:

Qian Luo, San Jose, CA (US);

Arvind Sundarrajan, San Jose, CA (US);

Hua Chung, San Jacinto, CA (US);

Xianmin Tang, San Jose, CA (US);

Jick M. Yu, San Jose, CA (US);

Murali K. Narasimhan, San Jose, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C25D 5/34 (2006.01); C25D 7/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus for selectively controlling deposition rate of conductive material during an electroplating process. Dopants are predominantly incorporated into a conductive seed layer on field regions of a substrate prior to filling openings in the field regions by electroplating. A substrate is positioned in one or more processing chambers, and barrier and conductive seed layers formed. A dopant precursor is provided to the chamber and ionized, with or without voltage bias. The dopant predominantly incorporates into the conductive seed layer on the field regions. Electrical conductivity of the conductive seed layer on the field regions is reduced relative to that of the conductive seed layer in the openings, resulting in low initial deposition rate of metal on the field regions during electroplating, and little or no void formation in the metal deposited in the openings.


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