The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 2014
Filed:
Mar. 31, 2010
Michael A. Van Buskirk, Saratoga, CA (US);
Christian Caillat, Versonnex, FR;
Viktor I Koldiaev, Morgan Hill, CA (US);
Jungtae Kwon, San Jose, CA (US);
Pierre C. Fazan, Lonay, CH;
Michael A. Van Buskirk, Saratoga, CA (US);
Christian Caillat, Versonnex, FR;
Viktor I Koldiaev, Morgan Hill, CA (US);
Jungtae Kwon, San Jose, CA (US);
Pierre C. Fazan, Lonay, CH;
Micron Technology, Inc., Boise, ID (US);
Abstract
A semiconductor memory device is disclosed. In one particular exemplary embodiment, the semiconductor memory device includes a plurality of memory cells arranged in an array of rows and columns. Each memory cell may include a first region connected to a source line extending in a first orientation. Each memory cell may also include a second region connected to a bit line extending a second orientation. Each memory cell may further include a body region spaced apart from and capacitively coupled to a word line, wherein the body region is electrically floating and disposed between the first region and the second region. The semiconductor device may also include a first barrier wall extending in the first orientation and a second barrier wall extending in the second orientation and intersecting with the first barrier wall to form a trench region configured to accommodate each of the plurality of memory cells.