The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2014

Filed:

Jun. 22, 2011
Applicants:

Ching-sen LU, Tainan, TW;

Wen-han Hung, Kaohsiung, TW;

Tsai-fu Chen, Hsinchu, TW;

Tzyy-ming Cheng, Hsinchu, TW;

Inventors:

Ching-Sen Lu, Tainan, TW;

Wen-Han Hung, Kaohsiung, TW;

Tsai-Fu Chen, Hsinchu, TW;

Tzyy-Ming Cheng, Hsinchu, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/7847 (2013.01);
Abstract

A method for fabricating a metal-oxide-semiconductor field-effect transistor includes the following steps. Firstly, a substrate is provided. A gate structure, a first spacer, a second spacer and a source/drain structure are formed over the substrate. The second spacer includes an inner layer and an outer layer. Then, a thinning process is performed to reduce the thickness of the second spacer, thereby retaining the inner layer of the second spacer. After a stress film is formed on the inner layer of the second spacer and the source/drain structure, an annealing process is performed. Afterwards, the stress film is removed.


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