The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 27, 2014

Filed:

Jun. 30, 2011
Applicants:

Hangbing LV, Beijing, CN;

Ming Liu, Beijing, CN;

Shibing Long, Beijing, CN;

Qi Liu, Beijing, CN;

Yanhua Wang, Beijing, CN;

Jiebin Niu, Beijing, CN;

Inventors:

Hangbing Lv, Beijing, CN;

Ming Liu, Beijing, CN;

Shibing Long, Beijing, CN;

Qi Liu, Beijing, CN;

Yanhua Wang, Beijing, CN;

Jiebin Niu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8239 (2006.01); G11C 11/21 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present disclosure relates to the microelectronics field, and particularly, to a metal oxide resistive switching memory and a method for manufacturing the same. The method may comprise: forming a W-plug lower electrode above a MOS device; sequentially forming a cap layer, a first dielectric layer, and an etching block layer on the W-plug lower electrode; etching the etching block layer, the first dielectric layer, and the cap layer to form a groove for a first level of metal wiring; sequentially forming a metal oxide layer, an upper electrode layer, and a composite layer of a diffusion block layer/a seed copper layer/a plated copper layer in the groove for the first level of metal wiring; patterning the upper electrode layer and the composite layer by CMP, to form a memory cell and the first level of metal wiring in the groove in the first dielectric layer; and performing subsequent processes to complete the metal oxide resistive switching memory. According to the present disclosure, the manufacture process can be simplified, without incorporating additional exposure steps in the standard process, resulting in advantages such as reduced cost.


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