The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 22, 2014

Filed:

Jul. 16, 2012
Applicants:

Yung-yao Lee, Zhubei, TW;

Ying Ying Wang, Xin-Zhu, TW;

Heng-hsin Liu, New Taipei, TW;

Chin-hsiang Lin, Hsin-Chu, TW;

Inventors:

Yung-Yao Lee, Zhubei, TW;

Ying Ying Wang, Xin-Zhu, TW;

Heng-Hsin Liu, New Taipei, TW;

Chin-Hsiang Lin, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A process for use in lithography, such as photolithography for patterning a semiconductor wafer, is disclosed. The process includes receiving an incoming semiconductor wafer having various features and layers formed thereon. A unit-induced overlay (uniiOVL) correction is received and a deformation measurement is performed on the incoming semiconductor wafer in an overlay module. A deformation-induced overlay (defiOVL) correction is generated from the deformation measurement results by employing a predetermined algorithm on the deformation measurement results. The defiOVL and uniiOVL corrections are fed-forward to an exposure module and an exposure process is performed on the incoming semiconductor wafer.


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