The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 08, 2014
Filed:
Jun. 06, 2012
Shunan Qiu, Tianjin, CN;
Guoliang Gong, Tianjin, CN;
Xuesong Xu, Tianjin, CN;
Xingshou Pang, Tianjin, CN;
Beiyue Yan, Tianjin, CN;
Yinghui LI, Tianjin, CN;
Shunan Qiu, Tianjin, CN;
Guoliang Gong, Tianjin, CN;
Xuesong Xu, Tianjin, CN;
Xingshou Pang, Tianjin, CN;
Beiyue Yan, Tianjin, CN;
Yinghui Li, Tianjin, CN;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A semiconductor package and method of assembling a semiconductor package includes encapsulating a first pre-packaged semiconductor die stacked on top of and interconnected with a second semiconductor die. The first packaged semiconductor die is positioned and fixed relative to a lead frame with a temporary carrier such as tape. The second semiconductor die is attached and interconnected directly to the first packaged semiconductor die and lead frame. The interconnected first packaged die and second semiconductor die, and lead frame are encapsulated to form the semiconductor package. Different types of semiconductor packages such as quad flat no-lead (QFN) and ball grid array (BGA) may be formed, which provide increased input/output (I/O) count and functionality.