The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 2014
Filed:
Jun. 20, 2007
John Boyd, Woodlawn, CA;
Fritz Redeker, Fremont, CA (US);
Yezdi Dordi, Palo Alto, CA (US);
Hyungsuk Alexander Yoon, San Jose, CA (US);
Shijian LI, San Jose, CA (US);
John Boyd, Woodlawn, CA;
Fritz Redeker, Fremont, CA (US);
Yezdi Dordi, Palo Alto, CA (US);
Hyungsuk Alexander Yoon, San Jose, CA (US);
Shijian Li, San Jose, CA (US);
Lam Research Corporation, Fremont, CA (US);
Abstract
Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit.