The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2014

Filed:

Feb. 07, 2012
Applicants:

An-chi Liu, Tainan, TW;

Chun-hsien Lin, Tainan, TW;

Yu-cheng Tung, Kaohsiung, TW;

Chien-ting Lin, Hsinchu, TW;

Wen-tai Chiang, Tainan, TW;

Shih-hung Tsai, Tainan, TW;

Ssu-i Fu, Kaohsiung, TW;

Ying-tsung Chen, Kaohsiung, TW;

Chih-wei Chen, Taichung, TW;

Inventors:

An-Chi Liu, Tainan, TW;

Chun-Hsien Lin, Tainan, TW;

Yu-Cheng Tung, Kaohsiung, TW;

Chien-Ting Lin, Hsinchu, TW;

Wen-Tai Chiang, Tainan, TW;

Shih-Hung Tsai, Tainan, TW;

Ssu-I Fu, Kaohsiung, TW;

Ying-Tsung Chen, Kaohsiung, TW;

Chih-Wei Chen, Taichung, TW;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor structure and a method of fabricating the same comprising the steps of providing a substrate, forming at least one fin structure on said substrate, forming a gate covering said fin structure, forming a plurality of epitaxial structures covering said fin structures, performing a gate pullback process to reduce the critical dimension (CD) of said gate and separate said gate and said epitaxial structures, forming lightly doped drains (LDD) in said fin structures, and forming a spacer on said gate and said fin structures.


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