The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2014

Filed:

Feb. 07, 2012
Applicants:

Joanna Wasyluk, Dresden, DE;

Stephan Kronholz, Dresden, DE;

Yew-tuck Chow, Dresden, DE;

Richard J. Carter, Dresden, DE;

Berthold Reimer, Dresden, DE;

Kai Tern Sih, Dresden, DE;

Inventors:

Joanna Wasyluk, Dresden, DE;

Stephan Kronholz, Dresden, DE;

Yew-Tuck Chow, Dresden, DE;

Richard J. Carter, Dresden, DE;

Berthold Reimer, Dresden, DE;

Kai Tern Sih, Dresden, DE;

Assignee:

GLOBALFOUNDRIES, Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating an integrated circuit is disclosed that includes, in accordance with an embodiment, providing an integrated circuit comprising a p-type field effect transistor (pFET), recessing a surface region of the pFET using an ammonia-hydrogen peroxide-water (APM) solution to form a recessed pFET surface region, and depositing a silicon-based material channel on the recessed pFET surface region.


Find Patent Forward Citations

Wasyluk, Joanna. (2014). Methods for pfet fabrication using apm solutions (U.S. Patent No. 8658543). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8658543

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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