The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2014

Filed:

Mar. 08, 2010
Applicants:

Yang Je Lee, Chungcheongbuk-do, KR;

IL Woon Shin, Busan, KR;

Going Sik Kim, Chungcheongbuk-do, KR;

Doo Pyo Hong, Chungcheongnam-do, KR;

Ha IL Kim, Seoul, KR;

Dong Gi an, Gyeongsangnam-do, KR;

Inventors:

Yang Je Lee, Chungcheongbuk-do, KR;

Il Woon Shin, Busan, KR;

Going Sik Kim, Chungcheongbuk-do, KR;

Doo Pyo Hong, Chungcheongnam-do, KR;

Ha Il Kim, Seoul, KR;

Dong Gi An, Gyeongsangnam-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/02 (2006.01); H05K 3/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a rigid-flexible printed circuit board, including providing a base substrate in which coverlays are respectively formed on two sides of a flexible copper foil laminate on both sides of which inner circuit patterns are respectively formed; layering insulation layers and copper foil layers on portions of coverlays which are to be a rigid region of the flexible copper foil laminate; forming a via hole in the rigid region, and, simultaneously, forming first windows in the coverlays in a flexible region; forming outer circuit patterns including areas adjacent to the first windows; and applying solder resist in the rigid region to expose portions of the external circuit patterns, where the outer circuit patterns formed in the areas adjacent to the first windows include additional plating portions for covering portions of the coverlays.


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