The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2013
Filed:
May. 31, 1996
Harry Randall Bickford, Ossining, NY (US);
Paul William Coteus, Yorktown Heights, NY (US);
Robert Heath Dennard, New Rochelle, NY (US);
Daniel Mark Dreps, Georgetown, TX (US);
Gerard Vincent Kopcsay, Yorktown Heights, NY (US);
Harry Randall Bickford, Ossining, NY (US);
Paul William Coteus, Yorktown Heights, NY (US);
Robert Heath Dennard, New Rochelle, NY (US);
Daniel Mark Dreps, Georgetown, TX (US);
Gerard Vincent Kopcsay, Yorktown Heights, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A structure is described having a plurality of electronic devices with the same or different internal CMOS voltages; an interconnection between two or more of the electronic devices; driver and receiver circuits which provide selectable input/output voltage levels for interfacing with several generations of CMOS technology, thus allowing chips fabricated in such technologies to communicate using a signal voltage range most suitable for each chip; Circuitry for selecting or adjusting the type of receiver circuit used, thus allowing either the use of a differential comparator circuit with an externally supplied reference voltage, or alternatively, the use of an inverter style receiver with an adjustable threshold, the selection being accomplished by setting the external reference to a predetermined voltage; Circuitry for selecting or adjusting the switching threshold of the inverter receiver circuit, which enables the threshold to be set appropriately for a given input signal voltage range.