The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2013

Filed:

Dec. 08, 2009
Applicants:

Kiyoshi Mitani, Annaka, JP;

Tsuyoshi Ohtsuki, Annaka, JP;

Toru Takahashi, Annaka, JP;

Wei Feig Qu, Annaka, JP;

Inventors:

Kiyoshi Mitani, Annaka, JP;

Tsuyoshi Ohtsuki, Annaka, JP;

Toru Takahashi, Annaka, JP;

Wei Feig Qu, Annaka, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/46 (2006.01); H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for producing a semiconductor wafer having a multilayer film, in production of a semiconductor device by the steps of forming a porous layer on a surface of a semiconductor wafer by changing a surface portion into the porous layer, forming a semiconductor film on a surface of the porous layer to produce a semiconductor wafer having a multilayer film, fabricating a device on the semiconductor film, and producing the semiconductor device by delaminating the semiconductor film along the porous layer, the semiconductor film having the device formed thereon, including flattening the semiconductor wafer after delaminating and reusing the flattened semiconductor wafer, the method further including a thickness adjusting step of adjusting a whole thickness of the semiconductor wafer having a multilayer film to be produced by reusing the semiconductor wafer so as to satisfy a predetermined standard.


Find Patent Forward Citations

Loading…