The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2013

Filed:

Nov. 10, 2010
Applicants:

Chun-yao Lee, Taipei County, TW;

Chin-lung Chen, Hsinchu County, TW;

Wei-chun Chang, Kaohsiung, TW;

Hung-te Lin, Hsinchu County, TW;

Han-min Huang, Taipei County, TW;

Inventors:

Chun-Yao Lee, Taipei County, TW;

Chin-Lung Chen, Hsinchu County, TW;

Wei-Chun Chang, Kaohsiung, TW;

Hung-Te Lin, Hsinchu County, TW;

Han-Min Huang, Taipei County, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
Abstract

An anti punch-through leakage current MOS transistor and a manufacturing method thereof are provided. A high voltage deep first type well region and a first type light doping region are formed in a second type substrate. A mask with a dopant implanting opening is formed on the second type substrate. An anti punch-through leakage current structure is formed by implanting the first type dopant through the dopant implanting opening. A doping concentration of the first type dopant of the high voltage deep first type well region is less than that of the anti punch-through leakage current structure and greater than that of the high voltage deep first type well region. A second type body is formed by implanting a second type dopant through the dopant implanting opening. A gate structure is formed on the second type substrate.


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