The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2013
Filed:
Mar. 08, 2012
Fuhan Liu, Atlanta, GA (US);
Nitesh Kumbhat, Atlanta, GA (US);
Venkatesh Sundaram, Alpharetta, GA (US);
Rao R. Tummala, Greensboro, GA (US);
Fuhan Liu, Atlanta, GA (US);
Nitesh Kumbhat, Atlanta, GA (US);
Venkatesh Sundaram, Alpharetta, GA (US);
Rao R. Tummala, Greensboro, GA (US);
Georgia Tech Research Corporation, Atlanta, GA (US);
Abstract
The various embodiments of the present invention provide a novel chip-last embedded structure, wherein an IC is embedded within a one to two metal layer substrate. The various embodiments of the present invention are comparable to other two-dimensional and three-dimensional WLFO packages of the prior art as the embodiments have similar package thicknesses and X-Y form factors, short interconnect lengths, fine-pitch interconnects to chip I/Os, a reduced layer count for re-distribution of chip I/O pads to ball grid arrays (BGA) or land grid arrays (LGA), and improved thermal management options.