The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2013
Filed:
Jun. 02, 2010
Chih-wen Yao, Hsinchu, TW;
Robert S. J. Pan, Guishan Township, TW;
Ruey-hsin Liu, Hsinchu, TW;
Hsueh-liang Chou, Jhubei, TW;
Puo-yu Chiang, Su-ao Township, TW;
Chi-chih Chen, Hsinchu, TW;
Hsiao Chin Tuan, Judong County, TW;
Chih-Wen Yao, Hsinchu, TW;
Robert S. J. Pan, Guishan Township, TW;
Ruey-Hsin Liu, Hsinchu, TW;
Hsueh-Liang Chou, Jhubei, TW;
Puo-Yu Chiang, Su-ao Township, TW;
Chi-Chih Chen, Hsinchu, TW;
Hsiao Chin Tuan, Judong County, TW;
Abstract
A high voltage (HV) device includes a gate dielectric structure over a substrate. The gate dielectric structure has a first portion and a second portion. The first portion has a first thickness and is over a first well region of a first dopant type in the substrate. The second portion has a second thickness and is over a second well region of a second dopant type. The first thickness is larger than the second thickness. A gate electrode is disposed over the gate dielectric structure. A metallic layer is over and coupled with the gate electrode. The metallic layer extends along a direction of a channel under the gate dielectric structure. At least one source/drain (S/D) region is disposed within the first well region of the first dopant type.