The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 30, 2013
Filed:
Aug. 09, 2011
Raymond Albert Fillion, Niskayuna, NY (US);
Kevin Matthew Durocher, Waterford, NY (US);
Richard Joseph Saia, Niskayuna, NY (US);
Charles Gerard Woychik, Niskayuna, NY (US);
Raymond Albert Fillion, Niskayuna, NY (US);
Kevin Matthew Durocher, Waterford, NY (US);
Richard Joseph Saia, Niskayuna, NY (US);
Charles Gerard Woychik, Niskayuna, NY (US);
General Electric Company, Schenectady, NY (US);
Abstract
An interconnect structure includes an insulative web having a first surface and a second surface; a logic device secured to the second surface of the insulative web; a frame panel assembly including a frame base having a first surface and a second surface, a first frame insulative layer disposed between the frame base first surface and the insulative web second surface, an aperture extending through the frame base and first frame insulative layer, wherein at least a portion of the logic device is disposed within the aperture, and a first frame connector disposed between a first electrically conductive layer located on the frame base first surface, and a second electrically conductive layer located on a surface of the first frame insulative layer; a device connector disposed between an I/O contact on a surface of the logic device and a third electrical conductor located on a surface of the insulative web; and an insulative layer connector that is disposed between the third electrical conductor located on a surface of the insulative web and the second electrically conductive layer located on a surface of the first frame insulative layer.