The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2013
Filed:
Dec. 08, 2008
Chan Ha Hwang, Anyang-si, KR;
Eun Sook Sohn, Seongdong-gu, KR;
Ho Choi, Jungnang-gu, KR;
Byong Jin Kim, Bucheon-si, KR;
Ji Yeon Yu, Seongnam-si, KR;
Min Woo Lee, Mapo-gu, KR;
Chan Ha Hwang, Anyang-si, KR;
Eun Sook Sohn, Seongdong-gu, KR;
Ho Choi, Jungnang-gu, KR;
Byong Jin Kim, Bucheon-si, KR;
Ji Yeon Yu, Seongnam-si, KR;
Min Woo Lee, Mapo-gu, KR;
Amkor Technology, Inc., Chandler, AZ (US);
Abstract
In accordance with the present invention, there is provided multiple embodiments of a package-in-package semiconductor device including shortened electrical signal paths to optimize electrical performance. The semiconductor device comprises a substrate having a conductive pattern formed thereon. In each embodiment of the semiconductor device, a semiconductor package and one or more semiconductor dies are vertically stacked upon the substrate, and placed into electrical communication with the conductive pattern thereof. In certain embodiments, a semiconductor die which is electrically connected to the conductive pattern of the substrate may be fully or partially covered with a film-over-wire. Additionally, in each embodiment of the semiconductor device, the vertically stacked electronic components thereof may be covered with a package body which also partially covers the substrate.