The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2013
Filed:
Sep. 23, 2011
Michimasa Takahashi, Gifu, JP;
Yukinobu Mikado, Gifu, JP;
Takenobu Nakamura, Gifu, JP;
Masakazu Aoyama, Gifu, JP;
Michimasa Takahashi, Gifu, JP;
Yukinobu Mikado, Gifu, JP;
Takenobu Nakamura, Gifu, JP;
Masakazu Aoyama, Gifu, JP;
Ibiden Co., Ltd., Ogaki-shi, JP;
Abstract
A method for manufacturing a multilayer printed wiring board including forming a multilayer printed wiring board structure comprising first and second buildup portions, the first buildup portion including insulating layers, conductor layers and first viaholes electrically connecting the conductor layers through the insulation layers such that the first viaholes are formed in the insulating layers, respectively, the second buildup portion including insulating layers, conductor layers and second viaholes electrically connecting the conductor layers through the insulation layers such that the first viaholes are tapered toward the second viaholes, and the second via holes are tapered toward the first viaholes. The viaholes are formed by plating openings formed after lamination of respective ones of the insulating layers of the buildup portions, and each insulating layer in the buildup portions is about 100 μm or less in thickness.