The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 2013
Filed:
Mar. 23, 2010
Yonggang LI, Chandler, AZ (US);
Amruthavalli P. Alur, Chandler, AZ (US);
Devarajan Balaraman, Chandler, AZ (US);
Xiwang Qi, Scottsdale, AZ (US);
Charan K. Gurumurthy, Higley, AZ (US);
Yonggang Li, Chandler, AZ (US);
Amruthavalli P. Alur, Chandler, AZ (US);
Devarajan Balaraman, Chandler, AZ (US);
Xiwang Qi, Scottsdale, AZ (US);
Charan K. Gurumurthy, Higley, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A semiconductor package comprises a semiconductor substrate that may comprise a core. The core may comprise one or more materials selected from a group comprising ceramics and glass dielectrics. The package further comprises a set of one or more inner conductive elements that is provided on the core, a set of one or more outer conductive elements that is provided on an outer side of the substrate, and a semiconductor die to couple to the substrate via one or more of the outer conductive elements. Example materials for the core may comprise one or more from alumina, zirconia, carbides, nitrides, fused silica, quartz, sapphire, and Pyrex. A laser may be used to drill one or more plated through holes to couple an inner conductive element to an outer conductive element. A dielectric layer may be formed in the substrate to insulate an outer conductive element from the core or an inner conductive element.